Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.advisor | 김대훈 | - |
| dc.contributor.author | Kim Heesoo | - |
| dc.date.accessioned | 2024-02-29T21:02:12Z | - |
| dc.date.available | 2024-02-29T21:02:12Z | - |
| dc.date.issued | 2024 | - |
| dc.identifier.uri | http://hdl.handle.net/20.500.11750/48097 | - |
| dc.identifier.uri | http://dgist.dcollection.net/common/orgView/200000723697 | - |
| dc.description | Tiered Memory System;Page Table Monitor; Physical Memory Address; Page Table Walk | - |
| dc.description.tableofcontents | Abstract List of Contents I. Introduction II. Background and Motivation 2.1. Tiered Memory System 2.2. Demand Paging and Page Fault 2.3. Performance Impact of Slow Memory 2.4. Effective Page Management Through Monitor III. Related Work 3.1. NUMA Hint Fault 3.2. PEBS: Processor Event-Based Sampling 3.3. Page Table-Based IV. Page Scan Acceleration by Dynamically Eliminating Page Table Walk 4.1. Challenges 4.1.1. Migration 4.1.2. De-allocation 4.1.3. Allocation 4.2. Main Architecture 4.2.1. Physical Memory Address List Initialization 4.2.2. Access Pattern Monitoring 4.2.3. Thresholds of Page Fault Tracking and Synchronization 4.2.4. Page Fault Tracking 4.2.5. Synchronize V. Evaluation 5.1. Experimental Methodology 5.2. Performance with Monitoring 5.2.1. Monitoring Overhead 5.2.2. Page Fault Tracking Overhead 5.2.3. Application Performance 5.3. Threshold Optimization 5.3.1. Page Fault Threshold 5.3.2. Synchronization Threshold and Time Window 5.3.3. Number of Untracked Pages to Tolerate 5.4. Effect of LRU and LFU 5.5. Comparison with PEBS 5.6. Overhead of Physical Memory Address List VI. Conclusion References 요약문 |
- |
| dc.format.extent | 36 | - |
| dc.language | eng | - |
| dc.publisher | DGIST | - |
| dc.title | Page Scanning Techniques for Efficient Hotness Tracking in Tiered Memory Systems | - |
| dc.title.alternative | 계층 메모리 시스템에서 효과적인 접근 빈도 측정을 위한 페이지 탐색 기법 | - |
| dc.type | Thesis | - |
| dc.identifier.doi | 10.22677/THESIS.200000723697 | - |
| dc.description.degree | Master | - |
| dc.contributor.department | Department of Electrical Engineering and Computer Science | - |
| dc.contributor.coadvisor | Donghoon Shin | - |
| dc.date.awarded | 2024-02-01 | - |
| dc.publisher.location | Daegu | - |
| dc.description.database | dCollection | - |
| dc.citation | XT.IM김97 202402 | - |
| dc.date.accepted | 2024-01-30 | - |
| dc.contributor.alternativeDepartment | 전기전자컴퓨터공학과 | - |
| dc.subject.keyword | Tiered Memory System | - |
| dc.subject.keyword | Page Table Monitor | - |
| dc.subject.keyword | Physical Memory Address | - |
| dc.subject.keyword | Page Table Walk | - |
| dc.contributor.affiliatedAuthor | Kim Heesoo | - |
| dc.contributor.affiliatedAuthor | Daehoon Kim | - |
| dc.contributor.affiliatedAuthor | Donghoon Shin | - |
| dc.contributor.alternativeName | 김희수 | - |
| dc.contributor.alternativeName | Daehoon Kim | - |
| dc.contributor.alternativeName | 신동훈 | - |
| dc.rights.embargoReleaseDate | 2028-08-31 | - |
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