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  Department of Electrical Engineering and Computer Science Computer Architecture and Systems Lab

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Article
T-CAT: Dynamic Cache Allocation for Tiered Memory Systems with Memory Interleaving
  • Lee, Hwanjun ; 
  • Lee, Seunghak ; 
  • Jung, Yeji ; 
  • Kim, Daehoon
  • 2023-07
  • Lee, Hwanjun. (2023-07). T-CAT: Dynamic Cache Allocation for Tiered Memory Systems with Memory Interleaving. IEEE Computer Architecture Letters, 22(2), 73–76. doi: 10.1109/LCA.2023.3290197
  • Institute of Electrical and Electronics Engineers
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Article
NoHammer: Preventing Row Hammer with Last-Level Cache Management
  • Lee, Seunghak ; 
  • Kang, Ki-Dong ; 
  • Park, Gyeongseo ; 
  • Kim, Nam Sung ; 
  • Kim, Daehoon
  • 2023-07
  • Lee, Seunghak. (2023-07). NoHammer: Preventing Row Hammer with Last-Level Cache Management. IEEE Computer Architecture Letters, 22(2), 157–160. doi: 10.1109/LCA.2023.3320670
  • Institute of Electrical and Electronics Engineers Inc.
  • View : 348
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Article
CoreNap: Energy Efficient Core Allocation for Latency-Critical Workloads
  • Park, Gyeongseo ; 
  • Kang, Ki-Dong ; 
  • Kim, Minho ; 
  • Kim, Daehoon
  • 2023-01
  • Park, Gyeongseo. (2023-01). CoreNap: Energy Efficient Core Allocation for Latency-Critical Workloads. IEEE Computer Architecture Letters, 22(1), 1–4. doi: 10.1109/LCA.2022.3227629
  • Institute of Electrical and Electronics Engineers
  • View : 373
  • Download : 0
Article
Deep Partitioned Training from Near-Storage Computing to DNN Accelerators
  • 2021-01
  • Jang, Yongjoo. (2021-01). Deep Partitioned Training from Near-Storage Computing to DNN Accelerators. doi: 10.1109/LCA.2021.3081752
  • Institute of Electrical and Electronics Engineers
  • View : 624
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Article
CPS 환경에 대한 Flush+Reload 캐시 부 채널 공격의 영향 및 Flush+Reload 캐시 부 채널 공격 탐지 기술
  • Park, Hyungwon ; 
  • Lee, Seung. Hak. ; 
  • Lee, Seungkyu ; 
  • Kim, Daehoon
  • 2021-02
  • Park, Hyungwon. (2021-02). CPS 환경에 대한 Flush+Reload 캐시 부 채널 공격의 영향 및 Flush+Reload 캐시 부 채널 공격 탐지 기술. doi: 10.5302/J.ICROS.2021.20.0176
  • 제어·로봇·시스템학회
  • View : 728
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Co-Adjusting Voltage/Frequency State and Interrupt Rate for Improving Energy-Efficiency of Latency-Critical Applications

Article
Co-Adjusting Voltage/Frequency State and Interrupt Rate for Improving Energy-Efficiency of Latency-Critical Applications
  • Kang, Ki-Dong ; 
  • Park, Hyungwon ; 
  • Park, Gyeongseo ; 
  • Kim, Daehoon
  • 2020-11
  • Kang, Ki-Dong. (2020-11). Co-Adjusting Voltage/Frequency State and Interrupt Rate for Improving Energy-Efficiency of Latency-Critical Applications. IEEE Access, 8, 201028–201039. doi: 10.1109/ACCESS.2020.3035777
  • Institute of Electrical and Electronics Engineers Inc.
  • View : 629
  • Download : 289
Article
IDIO: Orchestrating Inbound Network Data on Server Processors
  • Alian, Mohammad ; 
  • Shin, Jongmin ; 
  • Kang, Ki Dong ; 
  • Wang, Ren ; 
  • Daglis, Alexandros ; 
  • Kim, Daehoon ; 
  • Kim, Nam Sung
  • 2021-01
  • Alian, Mohammad. (2021-01). IDIO: Orchestrating Inbound Network Data on Server Processors. IEEE Computer Architecture Letters, 20(1), 30–33. doi: 10.1109/lca.2020.3044923
  • Institute of Electrical and Electronics Engineers
  • View : 690
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Defending Against Flush+Reload Attack With DRAM Cache by Bypassing Shared SRAM Cache

Article
Defending Against Flush+Reload Attack With DRAM Cache by Bypassing Shared SRAM Cache
  • 2020-09
  • Jang, Minwoo. (2020-09). Defending Against Flush+Reload Attack With DRAM Cache by Bypassing Shared SRAM Cache. IEEE Access, 8, 179837–179844. doi: 10.1109/ACCESS.2020.3027946
  • Institute of Electrical and Electronics Engineers Inc.
  • View : 917
  • Download : 711
Article
Network Packet Processing Mode-Aware Power Management for Data Center Servers
  • Kang, Ki Dong ; 
  • Park, Gyeoung Seo ; 
  • Kim, Nam Sung ; 
  • Kim, Daehoon
  • 2020-01
  • Kang, Ki Dong. (2020-01). Network Packet Processing Mode-Aware Power Management for Data Center Servers. IEEE Computer Architecture Letters, 19(1), 1–4. doi: 10.1109/LCA.2019.2926079
  • Institute of Electrical and Electronics Engineers
  • View : 800
  • Download : 0
Article
Exploiting OS-level Memory Offlining for DRAM Power Management
  • 2019-07
  • Lee, Seung. Hak. (2019-07). Exploiting OS-level Memory Offlining for DRAM Power Management. IEEE Computer Architecture Letters, 18(2), 141–144. doi: 10.1109/LCA.2019.2942914
  • Institute of Electrical and Electronics Engineers
  • View : 781
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