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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Lee, Sehwan | - |
| dc.contributor.author | Seol, Taeryoung | - |
| dc.contributor.author | Kim, Geunha | - |
| dc.contributor.author | Song, Minyoung | - |
| dc.contributor.author | Kim, Gain | - |
| dc.contributor.author | Yoon, Jong-Hyeok | - |
| dc.contributor.author | George, Arup K. | - |
| dc.contributor.author | Lee, Junghyup | - |
| dc.date.accessioned | 2025-02-03T22:10:18Z | - |
| dc.date.available | 2025-02-03T22:10:18Z | - |
| dc.date.created | 2024-09-20 | - |
| dc.date.issued | 2024-06-18 | - |
| dc.identifier.isbn | 9798350361469 | - |
| dc.identifier.issn | 2158-9682 | - |
| dc.identifier.uri | http://hdl.handle.net/20.500.11750/57859 | - |
| dc.description.abstract | This paper proposes a 97dB-PSRR, 178.4dB-FOMDR calibration-free 16-channel VCO-ΔΣ ADC system using a PVT-insensitive frequency-locked differential regulation (FLDR) scheme suitable for wireless ExG Acquisition. Thanks to the FLDR, the SNDR degradation in all 16 channels is less than 1dB over 1.4-2V supply and 20-60°C temperature ranges. Implemented in a 0.18μm standard CMOS process, the proposed system consumes 172μW from a 1.4V supply and occupies 2.7mm2 active area, while a single channel consumes 4.2μW and 0.12mm2, respectively. © 2024 IEEE. | - |
| dc.language | English | - |
| dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
| dc.relation.ispartof | Digest of Technical Papers - Symposium on VLSI Technology | - |
| dc.title | A 97dB-PSRR 178.4dB-FOMDR Calibration-Free VCO−ΔΣ ADC Using a PVT-Insensitive Frequency-Locked Differential Regulation Scheme for Multi-Channel ExG Acquisition | - |
| dc.type | Conference Paper | - |
| dc.identifier.doi | 10.1109/VLSITechnologyandCir46783.2024.10631536 | - |
| dc.identifier.scopusid | 2-s2.0-85203583706 | - |
| dc.identifier.bibliographicCitation | Lee, Sehwan. (2024-06-18). A 97dB-PSRR 178.4dB-FOMDR Calibration-Free VCO−ΔΣ ADC Using a PVT-Insensitive Frequency-Locked Differential Regulation Scheme for Multi-Channel ExG Acquisition. 2024 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2024. doi: 10.1109/VLSITechnologyandCir46783.2024.10631536 | - |
| dc.identifier.url | https://archive.vlsisymposium.org/24web/ | - |
| dc.citation.conferenceDate | 2024-06-16 | - |
| dc.citation.conferencePlace | US | - |
| dc.citation.conferencePlace | Honolulu | - |
| dc.citation.title | 2024 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2024 | - |
Department of Electrical Engineering and Computer Science
