A 97dB-PSRR 178.4dB-FOMDR Calibration-Free VCO−ΔΣ ADC Using a PVT-Insensitive Frequency-Locked Differential Regulation Scheme for Multi-Channel ExG Acquisition

Abstract

This paper proposes a 97dB-PSRR, 178.4dB-FOMDR calibration-free 16-channel VCO-ΔΣ ADC system using a PVT-insensitive frequency-locked differential regulation (FLDR) scheme suitable for wireless ExG Acquisition. Thanks to the FLDR, the SNDR degradation in all 16 channels is less than 1dB over 1.4-2V supply and 20-60°C temperature ranges. Implemented in a 0.18μm standard CMOS process, the proposed system consumes 172μW from a 1.4V supply and occupies 2.7mm2 active area, while a single channel consumes 4.2μW and 0.12mm2, respectively. © 2024 IEEE.