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BitS-Net: Bit-Sparse Deep Neural Network for Energy-Efficient RRAM-Based Compute-In-Memory

Title
BitS-Net: Bit-Sparse Deep Neural Network for Energy-Efficient RRAM-Based Compute-In-Memory
Author(s)
Karimzadeh, ForoozanYoon, Jong-HyeokRaychowdhury, Arijit
Issued Date
2022-05
Citation
IEEE Transactions on Circuits and Systems I: Regular Papers, v.69, no.5, pp.1952 - 1961
Type
Article
Author Keywords
Deep neural networkquantizationin memory computingDNN accelerator
ISSN
1549-8328
Abstract
The rising popularity of intelligent mobile devices and the computational cost of deep learning-based models call for efficient and accurate on-device inference schemes. We propose a novel model compression scheme that allows inference to be carried out using bit-level sparsity, which can be efficiently implemented using in-memory computing macros. In this paper, we introduce a method called BitS-Net to leverage the benefits of bit-sparsity (where the number of zeros are more than number of ones in binary representation of weight/activation values) when applied to compute-in-memory (CIM) with resistive RAM (RRAM) to develop energy efficient DNN accelerators operating in the inference mode. We demonstrate that BitS-Net improves the energy efficiency by up to 5x for ResNet models on the ImageNet dataset.
URI
http://hdl.handle.net/20.500.11750/16497
DOI
10.1109/TCSI.2022.3145687
Publisher
Institute of Electrical and Electronics Engineers
Related Researcher
  • 윤종혁 Yoon, Jong-Hyeok
  • Research Interests Artificial intelligence; SLAM; edge intelligence; in-memory computing; multi-standard Ethernet transceiver design
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Appears in Collections:
Department of Electrical Engineering and Computer Science Intelligent Integrated Circuits and Systems Lab 1. Journal Articles

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