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2. Conference Papers14

  Department of Electrical Engineering and Computer Science Intelligent Integrated Circuits and Systems Lab

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Showing results 1 to 14 of 14

Conference
A 65nm 687.5-TOPS/W Drive Strength-based SRAM Compute-In-Memory Macro with Adaptive Dynamic Range for Edge AI applications
  • 2024-11-19
  • Choi, Dong-Gu. (2024-11-19). A 65nm 687.5-TOPS/W Drive Strength-based SRAM Compute-In-Memory Macro with Adaptive Dynamic Range for Edge AI applications. IEEE Asian Solid-State Circuits Conference. doi: 10.1109/A-SSCC60305.2024.10848920
  • IEEE Solid-State Circuits Society
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Conference
A 97dB-PSRR 178.4dB-FOMDR Calibration-Free VCO−ΔΣ ADC Using a PVT-Insensitive Frequency-Locked Differential Regulation Scheme for Multi-Channel ExG Acquisition
  • 2024-06-18
  • Lee, Sehwan. (2024-06-18). A 97dB-PSRR 178.4dB-FOMDR Calibration-Free VCO−ΔΣ ADC Using a PVT-Insensitive Frequency-Locked Differential Regulation Scheme for Multi-Channel ExG Acquisition. 2024 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2024. doi: 10.1109/VLSITechnologyandCir46783.2024.10631536
  • Institute of Electrical and Electronics Engineers Inc.
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Conference
30.1 A 40nm VLIW Edge Accelerator with 5MB of 0.256pJ/b RRAM and a Localization Solver for Bristle Robot Surveillance
  • Spetalnick, Samuel D. ; 
  • Lele, Ashwin Sanjay ; 
  • Crafton, Brian ; 
  • Chang, Muya ; 
  • Ryu, Sigang ; 
  • Yoon, Jong-Hyeok ; 
  • Hao, Zhijian ; 
  • Ansari, Azadeh ; 
  • Khwa, Win-San ; 
  • Chih, Yu-Der ; 
    • et al
  • 2024-02-21
  • Spetalnick, Samuel D. (2024-02-21). 30.1 A 40nm VLIW Edge Accelerator with 5MB of 0.256pJ/b RRAM and a Localization Solver for Bristle Robot Surveillance. International Solid-State Circuits Conference, 482–484. doi: 10.1109/ISSCC49657.2024.10454500
  • IEEE Solid-State Circuits Society
  • View : 296
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Conference
BEE-SLAM: A 65nm 17.96 TOPS/W 97.55%-Sparse-Activity Hybrid Mixed-Signal/Digital Multi-Agent Neuromorphic SLAM Accelerator for Swarm Robotics
  • 2024-04-23
  • Lee, Jaehyun. (2024-04-23). BEE-SLAM: A 65nm 17.96 TOPS/W 97.55%-Sparse-Activity Hybrid Mixed-Signal/Digital Multi-Agent Neuromorphic SLAM Accelerator for Swarm Robotics. 44th Annual IEEE Custom Integrated Circuits Conference, CICC 2024, 1–2. doi: 10.1109/CICC60959.2024.10529026
  • IEEE Solid-State Circuits Society
  • View : 97
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Conference
A Neuromorphic SLAM Accelerator Supporting Multi-Agent Error Correction in Swarm Robotics
  • 2022-10-20
  • Lee, Jaehyun. (2022-10-20). A Neuromorphic SLAM Accelerator Supporting Multi-Agent Error Correction in Swarm Robotics. 19th International SoC Design Conference (ISOCC) - SoC Technology Towards a New Era of Innovation, 241–242. doi: 10.1109/ISOCC56007.2022.10031388
  • Institute of Semiconductor Engineers of Korea (반도체공학회), IEEE Circuits and Systems (CAS) Society
  • View : 136
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Conference
A PRAM-based PIM Macro Using the Gilbert Multiplier-based Active Feedback and Input-aware SAR ADC
  • Yu, Seongyeon ; 
  • Hur, Namwook ; 
  • Kim, Wansun ; 
  • Cho, Mann-Ho ; 
  • Sohn, Hyunchul ; 
  • Suh, Joonki ; 
  • Jeong, Hongsik ; 
  • Yoon, Jong-Hyeok
  • 2023-10-26
  • Yu, Seongyeon. (2023-10-26). A PRAM-based PIM Macro Using the Gilbert Multiplier-based Active Feedback and Input-aware SAR ADC. International System-on-Chip Design Conference, ISOCC 2023, 21–22. doi: 10.1109/isocc59558.2023.10396557
  • Institute of Semiconductor Engineers of Korea (반도체공학회), IEEE Circuits and Systems (CAS) Society
  • View : 147
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Conference
A GaN-Based Reconfigurable Series-Parallel Hybrid Converter Supporting 48/24/12V Input and 0.8-1.2V Output with 83.7/87.8/90.7% Peak Efficiency
  • Gong, Minxiang ; 
  • Chen, Hua ; 
  • Chang, Muya ; 
  • Yoon, Jong-Hyeok ; 
  • Zhang, Xin ; 
  • Jain, Rinkle ; 
  • Raychowdhury, Arijit
  • 2023-03-22
  • Gong, Minxiang. (2023-03-22). A GaN-Based Reconfigurable Series-Parallel Hybrid Converter Supporting 48/24/12V Input and 0.8-1.2V Output with 83.7/87.8/90.7% Peak Efficiency. Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2023, 912–918. doi: 10.1109/APEC43580.2023.10131253
  • IEEE Industry Applications Society
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Conference
A 40nm 100Kb 118.44TOPS/W Ternary-weight Computein-Memory RRAM Macro with Voltage-sensing Read and Write Verification for reliable multi-bit RRAM operation
  • Yoon, Jong-Hyeok ; 
  • Chang, Muya ; 
  • Khwa, Win-San ; 
  • Chih, Yu-Der ; 
  • Chang, Meng-Fan ; 
  • Raychowdhury, Arijit
  • 2021-04-29
  • Yoon, Jong-Hyeok. (2021-04-29). A 40nm 100Kb 118.44TOPS/W Ternary-weight Computein-Memory RRAM Macro with Voltage-sensing Read and Write Verification for reliable multi-bit RRAM operation. IEEE Custom Integrated Circuits Conference (CICC 2021), 152–153. doi: 10.1109/CICC51472.2021.9431412
  • IEEE Solid-State Circuits Society
  • View : 130
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Conference
Statistical Optimization of Compute In-Memory Performance under Device Variation
  • Crafton, Brian ; 
  • Spetalnick, Samuel ; 
  • Yoon, Jong-Hyeok ; 
  • Raychowdhury, Arijit
  • 2021-07-26
  • Crafton, Brian. (2021-07-26). Statistical Optimization of Compute In-Memory Performance under Device Variation. IEEE International Symposium on Low-Power Electronics and Design, 1–6. doi: 10.1109/ISLPED52811.2021.9502484
  • Institute of Electrical and Electronics Engineers Inc.
  • View : 109
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Conference
CIM-SECDED: A 40nm 64Kb Compute In-Memory RRAM Macro with ECC Enabling Reliable Operation
  • Crafton, Brian ; 
  • Spetalnick, Samuel ; 
  • Yoon, Jong-Hyeok ; 
  • Wu, Wei ; 
  • Tokunaga, Carlos ; 
  • De, Vivek ; 
  • Raychowdhury, Arijit
  • 2021-11-09
  • Crafton, Brian. (2021-11-09). CIM-SECDED: A 40nm 64Kb Compute In-Memory RRAM Macro with ECC Enabling Reliable Operation. IEEE Asian Solid-State Circuits Conference, 1–3. doi: 10.1109/A-SSCC53895.2021.9634742
  • IEEE Solid-State Circuits Society
  • View : 77
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Conference
Characterization and Mitigation of IR-Drop in RRAM-based Compute In-Memory
  • Crafton, Brian ; 
  • Talley, Connor ; 
  • Spetalnick, Samuel ; 
  • Yoon, Jong-Hyeok ; 
  • Raychowdhury, Arijit
  • 2022-05-30
  • Crafton, Brian. (2022-05-30). Characterization and Mitigation of IR-Drop in RRAM-based Compute In-Memory. IEEE International Symposium on Circuits and Systems (ISCAS 2022), 70–74. doi: 10.1109/ISCAS48785.2022.9937307
  • IEEE Circuits and Systems Society
  • View : 133
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Conference
DualPIM: A Dual-Precision and Low-Power CNN Inference Engine Using SRAM- and eDRAM-based Processing-in-Memory Arrays
  • 2022-06-14
  • Jung, Sangwoo. (2022-06-14). DualPIM: A Dual-Precision and Low-Power CNN Inference Engine Using SRAM- and eDRAM-based Processing-in-Memory Arrays. 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2022, 70–73. doi: 10.1109/AICAS54282.2022.9869905
  • Institute of Electrical and Electronics Engineers Inc.
  • View : 191
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Conference
Improving compute in-memory ECC reliability with successive correction
  • Crafton, Brian ; 
  • Wan, Zishen ; 
  • Spetalnick, Samuel ; 
  • Yoon, Jong-Hyeok ; 
  • Wu, Wei ; 
  • Tokunaga,Carlos ; 
  • De, Vivek ; 
  • Raychowdhury, Arijit
  • 2022-07-13
  • Crafton, Brian. (2022-07-13). Improving compute in-memory ECC reliability with successive correction. Design Automation Conference, 745–750. doi: 10.1145/3489517.3530526
  • Association for Computing Machinery
  • View : 133
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Conference
A 1V-Supply 1.85VPP-Input-Range 1kHz-BW 181.9dB-FOMDR179.4dB-FOMSNDR2nd-Order Noise-Shaping SAR-ADC with Enhanced Input Impedance in 0.18μm CMOS
  • 2023-02-22
  • Kim, Geunha. (2023-02-22). A 1V-Supply 1.85VPP-Input-Range 1kHz-BW 181.9dB-FOMDR179.4dB-FOMSNDR2nd-Order Noise-Shaping SAR-ADC with Enhanced Input Impedance in 0.18μm CMOS. International Solid-State Circuits Conference, 484–486. doi: 10.1109/ISSCC42615.2023.10067844
  • IEEE Solid-State Circuits Society
  • View : 244
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